Programmable logic devices - PLD

24 February 2010.

• EPROM
• EEPROM
• GAL

EPROM

EPROM ( Erasable Programmable Read Only Memory) is logic device which can be used as ordinary memory structure or as complex logic structure (used to realize a various logic function's). Once programmed content of EPROM can not be altered: it can be only used as ROM (read only) memory in normal working conditions. However, it's possible to reprogram EPROM by erasing the whole content of it and then entering in so called program mode which allows programming of EPROM (writing desired data in EPROM).
Erasure of EPROM is performed by UV-light: the transparent lid allows the user to expose the chip to ultraviolent light to erase bit pattern.
Programming of EPROM is performed by applying high voltage (~21v), bringing desired address and data bits on specified pins and by changing control signals (OE,CE,PGM) in determined program pulse. There are two ways of programming EPROM:

1. Simple programming is programming which is used to program EPROM of lower capacity (8192 x 8bit-27128 or 4096 x 8bit-2764). It uses a wide program pulse (~50ms) which results that programming takes longer time (including verifying).
2. High performance programming is used to program EPROM's of larger capacity (27256, 27512,..). It is quick and reliably programming performed by so called "intelligent" high performance programators. Note: you can't program every EPROM chip by this method because the chip must support this kind of programming.

High performance programators are much more expensive then simple programatars but they provides users with variety of functions:
-they can program other PLD devices such are GAL, EEPROM, PIC 16xx microchips.
-they can be adjusted to program any new PLD device (they have ability to adapt voltage levels to new chips and to change functions of pins). It means that user have to purchase new software (which comes with new type of PLD) to program that new PLD so he doesn't have to purchase whole new programator.
Example:
GALEP for PC is high performance programator which can program 8-bit EPROMs (max 32 pin), 16-bit EPROMs (max 40 pin), Flash EPROMs, EEPROMs, serial EEPROMs, GALs, microcontrollers 87 x 51/52 and microchip PIC 16xx.
Programming 27C512 (64Kb) EPROM takes about 13sec.
Price: 698DEM (Deutch Marks)
Source:CONRAD Electronic Hauptkatalog 97.

Marks for EPROM chips
27128: first two numbers tells us that it's UV-erasable EPROM, other three numbers are capacity of EPROM in Kbits:128Kbits=16384 x 8bit (16Kbyte). Note: EPROM can be also organized as 16bit matrix or 4bit matrix.
27C512: "C" means that EPROM is manufactured in CMOS technology.
Example:
HN27C64G-15: 8Kb (8192x8bit) UV-erasable EPROM in CMOS technology made by HITACHI (mark "HN") with 150ns access time (mark "-15").

Price
27128 (16K x 8) with access time of 200ns:11.5DEM
27512 (64K x 8) with access time of 200ns:16.95DEM
27C512 (64K x 8) with access time of 150ns:8.95DEM
27C1024 (64K x 16) with access time of 150ns:16.95DEM
Source:CONRAD Electronic Hauptkatalog 97.

Pin outs

A0-A1 Addresses CE Chip enable OE Output enable D0-D7 Data PGM Program Vcc,Vpp Power

Note: On picture is 27128 16Kb EPROM .
2764 EPROM has same configuration of pins, but it doesn't has "A13" (that pin is marked as "N.C.":not connected).
27256 EPROM also has same pin configuration but instead of PGM it has pin marked "A14" (it doesn't has PGM).

Comparison between HN27128G-25and HN27C256G-20

HN27128G-25

HN27128G-25 is 16Kbyte UV erasable EPROM which supports both simple and high performance programming.
Features:

• Single power supply:
  +5v +/-5%
• Simple programming:
  -Program voltage: Vpp=+21v DC
  -Program with One 50ms pulse
• Static:
  -No clock required
  -Inputs and outputs TTL compatible during both read and program mode
• Access time:
  250ns
• Low stand-by current:
  35mA
• Absolute max. rating of Vpp pin
  26.5v
• High performance programming available
• Compatible with INTEL 27128
  
  

Mode selection

Note:
VL - low voltage (logic "0") level
VH - high voltage (logic "1") level
x - don't care
Vpp - program voltage +21v
Vcc - +5v
High Z - high impedance

Simple programming time diagram

HN27256G-20

HN27256G-20 is 32Kbyte EPROM manufactured in CMOS technology providing very low power dissipation.
Features:

• Low power dissipation:
  -20mW/Mhz (Active mode)
  -5microW (Standby mode)
• Access time:
  200ns
• Single power supply:
  +5v +/-5%
• High performance programming:
  -program voltage: +12.5v DC
• Static:
  -No clock required
  -Inputs and outputs TTL compatible during both read and program mode
• Absolute max. rating of Vpp pin
  14.0v
• Compatible with INTEL 27256

Mode selection

Note:
VL - low voltage (logic "0") level
VH - high voltage (logic "1") level
x - don't care
Vpp - program voltage +12.5v
Vcc - +5v
High Z - high impedance

High performance programming time diagram

Note: You can see that this diagram isn't much different then simple prog. diagram but main difference is that all signals at high performance prog. are much shorter. (quicker programming).

EEPROM

Electrically erasable and programmable ROM (EEPROM) are programmable logic devices having similar characteristics as ordinary EPROM. Main difference and main advantage of EEPROM is that they can be electrically erased with possibility to erase specified byte within contest of chip ( not whole contest of chip like ordinary EPROM).
Because of that they are widely use in various modern electronic devices. E.G. Within TV-sets they are used for memorizing current volume, program channels and other parameters. Even if the TV is unplugged from power source these parameters are preserved in EEPROM. When user changes these parameters he actually reprograms EEPROM in TV (or PC-monitor). Disadvantages of these devices are that they are expensive and they have high power dissipation.

Price
28C64 (8K x 8) 250ns: 17.95DEM
28C256 (32K x 8) 150ns: 49.90DEM

Example: HN28064P-25 (HITACHI)

Pin outs

A0-A1 Addresses CE Chip enable OE Output enable D0-D7 Data WE Write enable Vcc Power

Features:

• Single 5v supply
• Address, data CE, OE latches
• Byte erase / write time:
  10ms typ.
• Chip erase time:
  20ms typ.
• Fast access time:
  250ns
• Low power dissipation:
  -300mW (Active)
  -125mW (Standby)
• Conforms to JEDEC Byte-Wide Standard
• Reliable N-channel MNOS technology
• 1000 erase/write cycles

Mode selection

GAL

Generic Array Logic (GAL) is programmable logic device ( CMOS technology) using EEPROM controlling bits providing electrically erasing and programming. The main function of GAL is to substitute two, three or more ordinary logic circuits (AND, NAND, NOT gates and bistabiles) but also they can be used as memory cells. GAL is consist of output logic macrocells (OLMC) which can be programmed as:

• sequential output (like D-bistabil)
• combinational input/output
• combinational output
• combinational input

You can see that all outputs can be programmed as ordinary inputs, or as sequential outputs which make GAL to be a simple memory cell.
All bistabils (if programmed as sequential output) have same clock input, and all outputs are controlled with OE (output enable) signal which can force outputs in high Z state.
Programming of GAL is performed by high performance programators, usually in program language called CUPL (Universal Compiler for Programmable Logic).
Once programmed the contest of GAL is protected by unauthorized analyze and copying, because of so called security cell. The security cell can be erased only in erase cycle, so the original configuration can never be examined once this cell is programmed.

Example: GAL16V8AS (SGS-Thomson)

Pin outs

I0-I9 Inputs Cp Clock OE Output enable F0-F7 I/O

Features:

• 10ns propagation delay
• Fmax = 62.5Mhz
• 7ns max. from clock input to data output
• TTL compatible 24mA outputs
• Very low power:
  -90mA typ. (115max) Icc Half power selection, 27mA (30mA max.) eight power selection
• Reconfigurable logic/reprogrammable cells
• Eight output macrocells:
  -maximum flexibility for complex logic design
  -also emulates 21 types of 20pin PAL map/parametric compatibility